Here's what published — published is not granted. Application US20220327656A1, "Dynamic Precision Management for Integer Deep Learning Primitives," published October 13, 2022, lists Intel inventors including Naveen Mellempudi and Dheevatsa Mudigere. The CPC list is dense with arithmetic and network codes: G06F 7/5443, G06F 17/16, G06N 3/063 (neural-network hardware), G06N 3/084.
The mechanism is precision on demand. Integer arithmetic is far cheaper than floating point, which is why inference increasingly runs in 8-bit or smaller integers. But a fixed low precision can hurt accuracy in sensitive parts of a computation. "Dynamic precision management" means adjusting the numeric precision of integer primitives during execution — spending more bits where the math is delicate, fewer where it isn't — to balance speed against accuracy at runtime rather than committing to one precision up front.
For Intel, this is hardware-aligned IP. The G06N 3/063 and G06F arithmetic codes show the claims reach toward the silicon primitives that execute deep-learning math. Owning the method for dynamically managing precision on those primitives protects a performance knob that lives in Intel's own accelerators and instruction sets.
Because this is a publication, the verb is "claims as filed," and the allowed claims may narrow. There is nothing enforceable until a grant issues. The document is a signal of Intel's low-level efficiency research, not a right.
The takeaway: US20220327656A1 is a published marker at the hardware-math layer of AI efficiency — dynamic integer precision — and a reminder that the most hardware-proximate AI patents come from the silicon vendors, but only become assertable once they issue.