Here's what actually issued — and this one is granted, which is notable in a field still dominated by applications. On July 1, 2025, Hewlett Packard Enterprise Development LP was granted US12346252B1, "Efficient key-value cache management for large language models," inventors including Aditya Dhakal and Dejan Milojicic. The CPC codes are memory-system classes G06F 12/0802 (cache) and G06F 2212/60.
The mechanism is systems-level cache management. Where the model labs attack the KV-cache through routing and the silicon vendors through quantization, HPE — an enterprise-systems company — attacks it through cache management: how the key-value data is placed, evicted, and moved across the memory hierarchy to serve LLMs efficiently. The G06F 12/0802 caching CPC places this squarely in the computer-architecture tradition of cache design, applied to the LLM workload.
That this issued as a grant, while most KV-cache filings remain pending applications, is the prosecution-minded point. A granted B1 is enforceable now; the many A1 applications around it are not. For a freedom-to-operate analysis of LLM serving infrastructure, the handful of issued grants like this one carry weight that the larger pile of applications does not.
On scope, the discipline: granted B1, enforceable, but the claims describe a specific cache-management method for serving LLMs. They do not cover the KV-cache concept or LLM serving generally. The memory-system CPCs and claim 1 define the boundary — read them before assessing reach.
The takeaway: US12346252B1 is one of the few KV-cache patents that has actually issued, framing the problem as classic cache management from a systems vendor — a concrete, enforceable data point in a subfield where most of the activity is still aspirational filings.