Here's what actually issued. On May 21, 2024, Google LLC was granted US11989258B2, "Performing matrix multiplication in hardware," inventors Andrew Everett Phelps and Norman Paul Jouppi — Jouppi being the architect closely associated with Google's TPU. The CPC list is hardware-math: G06F 17/16 (matrix operations), G06F 7/483 and 7/4876 (floating-point arithmetic), plus neural codes G06N 3/063 and G06N 3/048.
The mechanism is the beating heart of AI compute. Neural-network inference and training are, at the lowest level, enormous sequences of matrix multiplications. The TPU's whole reason to exist is doing those multiplications faster and more efficiently than general-purpose hardware. This grant claims a specific method for performing matrix multiplication in hardware — the arithmetic-and-dataflow technique that an accelerator uses to crunch the math.
Strategically, this is foundational silicon IP. The named inventor and the CPC footprint point straight at Google's custom-accelerator program. Owning hardware matrix-multiply methods protects the core of a TPU's advantage; it's the kind of grant that sits underneath an entire generation of inference and training chips.
On scope, the house rule: granted B2, enforceable, but the claims describe a specific hardware matrix-multiplication method. Matrix multiplication itself is centuries-old math and obviously unpatentable; what's claimed is a particular hardware implementation. The arithmetic CPCs and claim 1 define the actual boundary — read them before describing what's fenced.
The takeaway: US11989258B2 is about as foundational as AI hardware IP gets — the matrix-multiply method at the core of Google's accelerators, authored by the TPU's lead architect, with claims tied to a concrete hardware technique rather than the math itself.